| Title |
Performance Analysis of Bit-Width Reduced Floating-Point Arithmetic Units in FPGAs: A Case Study of Neural Network-Based Face Detector
|
|---|---|
| Published in |
EURASIP Journal on Embedded Systems, July 2009
|
| DOI | 10.1155/2009/258921 |
| Authors |
Yongsoon Lee, Younhee Choi, Seok-Bum Ko, Moon Ho Lee |
Mendeley readers
The data shown below were compiled from readership statistics for 15 Mendeley readers of this research output. Click here to see the associated Mendeley record.
Geographical breakdown
| Country | Count | As % |
|---|---|---|
| Finland | 1 | 7% |
| Unknown | 14 | 93% |
Demographic breakdown
| Readers by professional status | Count | As % |
|---|---|---|
| Student > Ph. D. Student | 4 | 27% |
| Student > Master | 3 | 20% |
| Student > Bachelor | 2 | 13% |
| Researcher | 2 | 13% |
| Lecturer | 1 | 7% |
| Other | 0 | 0% |
| Unknown | 3 | 20% |
| Readers by discipline | Count | As % |
|---|---|---|
| Engineering | 7 | 47% |
| Computer Science | 4 | 27% |
| Unknown | 4 | 27% |