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An FPGA Implementation of a Parallelized MT19937 Uniform Random Number Generator

Overview of attention for article published in EURASIP Journal on Embedded Systems, July 2009
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7 Mendeley
Title
An FPGA Implementation of a Parallelized MT19937 Uniform Random Number Generator
Published in
EURASIP Journal on Embedded Systems, July 2009
DOI 10.1155/2009/507426
Authors

Vinay Sriram, David Kearney

Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 7 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Unknown 7 100%

Demographic breakdown

Readers by professional status Count As %
Student > Bachelor 3 43%
Lecturer 1 14%
Lecturer > Senior Lecturer 1 14%
Researcher 1 14%
Student > Postgraduate 1 14%
Other 0 0%
Readers by discipline Count As %
Engineering 5 71%
Computer Science 2 29%