| Title |
A Formal Approach to the Verification of Networks on Chip
|
|---|---|
| Published in |
EURASIP Journal on Embedded Systems, March 2009
|
| DOI | 10.1155/2009/548324 |
| Authors |
Dominique Borrione, Amr Helmy, Laurence Pierre, Julien Schmaltz |
Mendeley readers
The data shown below were compiled from readership statistics for 13 Mendeley readers of this research output. Click here to see the associated Mendeley record.
Geographical breakdown
| Country | Count | As % |
|---|---|---|
| Unknown | 13 | 100% |
Demographic breakdown
| Readers by professional status | Count | As % |
|---|---|---|
| Student > Ph. D. Student | 5 | 38% |
| Student > Master | 2 | 15% |
| Researcher | 2 | 15% |
| Student > Doctoral Student | 1 | 8% |
| Lecturer | 1 | 8% |
| Other | 1 | 8% |
| Unknown | 1 | 8% |
| Readers by discipline | Count | As % |
|---|---|---|
| Computer Science | 10 | 77% |
| Engineering | 2 | 15% |
| Unknown | 1 | 8% |