Better verification through symmetry

Overview of attention for article published in Formal Methods in System Design, August 1996

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So far, Altmetric has seen 4 patents that reference this research output.

Method and apparatus for word-level netlist preprocessing and analysis using same

Grant US-10089427-B2

United States of America

Method and apparatus for word-level netlist reduction and verification using same

Grant US-9489477-B2

United States of America

Method and apparatus for memory abstraction and for word level net list reduction and…

Grant US-8104000-B2

United States of America

Method and apparatus for memory abstraction and verification using same

Grant US-8001498-B2

United States of America