Transaction-level modeling for architectural and power analysis of PowerPC and CoreConnect-based systems

Overview of attention for article published in Design Automation for Embedded Systems, September 2006

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So far, Dimensions has found 10 publications that cite this research output.

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The most recent citing publications are shown below. View all 10 publications that cite this research output on Dimensions.

A simulation framework for code-level energy estimation of embedded soft-core processors

Article in SIMULATION (March 2017)

Process Synchronization in Multi-Core Systems Using On-Chip Memories

Conference proceeding (January 2014)

Power-Aware Wrappers for Transaction-Level Virtual Prototypes: a Black Box Based Approach

Conference proceeding (January 2013)